Altera Offers Optimized Correlator IP Architecture for CDMA, W-CDMA, and 3G Wireless Basestations
SAN JOSE, Calif.--(BUSINESS WIRE)--Sept. 27, 2001--Available
immediately today from Altera Corporation (Nasdaq:ALTR) is its
correlator megafunction and Direct Sequence Spread Spectrum (DSSS)
reference design. Both specifically optimized for the CDMA and W-CDMA
standards, this joint offering of intellectual property and a
corresponding reference design allows engineers to simplify the design
of wireless basestations and baseband modems, significantly reducing
the time from concept to hardware implementation.
Both the correlator and the DSSS reference design can be used with
the DSP development kit for APEX(TM) devices for easy prototyping and
debugging of designs for the next generation of wireless basestations.
Accompanying the DSP development kit for APEX(TM) devices, Altera's
DSSS reference design illustrates the use of the Altera's correlator
megafunction, FIR compiler and NCO compiler for various channelization
and spreading/dispreading techniques. In addition, the 3rd Generation
Partnership Project (3GPP) has recently adopted DSSS as the
channelization technique for 3G W-CDMA basestations.
One of the fundamental building blocks of wireless basestations,
the correlator function is primarily used for spreading/despreading,
random access channel (RACH) detection, and synchronization of data in
baseband modem section of the wireless basestation. By optimizing the
correlator and its corresponding reference design, Altera delivers
significant cost savings by reducing the logic area compared with
competing architectures. For example, using Altera's new patented
architecture, a RACH detector consumes only 5,000 logic elements (LEs)
in an APEX II device, which is at least 50 percent more efficient than
competing solutions.
Systems designers can easily create custom functions with the
interactive MegaWizard® Plug-In Manager for the correlator
MegaCore® function. Using the MegaWizard Plug-In Manager, the
designer can easily change system parameters such as block length,
number of chips, and oversampling.
``Altera has developed the correlator function and the DSSS
reference design as a result of growing customer requirements for
implementing cost-efficient basestations,'' said Justin Cowling,
director of IP marketing at Altera. ``Altera continues to focus on
customer needs in the wireless marketplace and today offers the most
economical and lowest risk system solutions for the wireless
infrastructure systems.''
The correlator MegaCore function is one of the many IP cores that
have an Avalon bus interface for microprocessor control using Altera's
Excalibur(TM) embedded processor solutions -- the industry's only
embedded processor based programmable logic device (PLD) family.
Combining logic, memory, and a processor core, Altera's Excalibur
embedded processor solutions provide engineers with the flexibility of
integrating a complete system-on-a-programmable-chip (SOPC) solution.
Pricing and Availability
The correlator (ordering code: IP-CORRELATOR) function is
optimized for the APEX II and Mercury(TM) device families. The core is
listed at $8,995 for a perpetual license with 12 months of upgrades
and technical support. The DSSS reference design is available at no
cost. Both these products can be downloaded from the IP Megastore(TM)
web site at http://www.altera.com/IPmegastore. Detailed documentation
about these products can be found on the IP Megastore web site as
well.
About Altera
Altera Corporation, The Programmable Solutions Company®, was
founded in 1983 and is a leading supplier of programmable logic
devices (PLDs). Altera's CMOS-based PLDs are user-programmable
semiconductor chips that enhance flexibility and reduce time-to-market
for companies in the communications, computer peripheral, and
industrial markets. By using high performance devices, software
development tools, and sophisticated intellectual property cores,
system-on-a-programmable-chip (SOPC) solutions can be created with
embedded processors, memory, and other complex logic together on a
single PLD. Altera common stock is traded on The Nasdaq Stock Market
under the symbol ALTR. More information on Altera is available on the
Internet at http://www.altera.com.
Note to Editors: Altera, The Programmable Solutions Company, the
stylized Altera logo, specific device designations and all other words
that are identified as trademarks and/or service marks are, unless
noted otherwise, the trademarks and service marks of Altera
Corporation in the U.S. and other countries. All other product or
service names are the property of their respective holders.
Contact:
Altera Corporation
Bruce Fienberg, 408/544-6866
bfienber@altera.com
OR
PR21
Matthew Stotts, 415/369-8117
matthew.stotts@pr21.com
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